Title :
A system-on-a-chip for pattern recognition architecture and design methodology
Author :
Aberbour, Mourad ; Mehrez, Habib ; Durbin, François ; Haussy, Jacques ; Lalande, Piere ; Tissot, André
Author_Institution :
Lab. LIP6/ASIM, Univ. Pierre et Marie Curie, Paris, France
Abstract :
We address in this paper the design and specification of a heterogeneous architecture of a SOC (System-On-a-Chip) for pattern recognition. Once the algorithms involved presented, we investigate the hardware/software codesign methodology, the system architecture and finally the VLSI physical integration. We conclude by giving results on the performance of the system regarding recognition rate and VLSI characteristics
Keywords :
VLSI; formal specification; hardware-software codesign; pattern recognition; VLSI characteristics; VLSI physical integration; design methodology; hardware/software codesign; heterogeneous architecture; pattern recognition architecture; specification; system architecture; system-on-a-chip; Coprocessors; Data mining; Design methodology; Frequency; Gabor filters; Information filtering; Information filters; Pattern recognition; System-on-a-chip; Very large scale integration;
Conference_Titel :
Computer Architectures for Machine Perception, 2000. Proceedings. Fifth IEEE International Workshop on
Conference_Location :
Padova
Print_ISBN :
0-7695-0740-9
DOI :
10.1109/CAMP.2000.875973
