Title :
Evaluation of Stresses in Thin Device Wafer using Piezoresistive Stress Sensor
Author :
Kumar, Aditya ; Zhang, Xiaowu ; Zhang, Q.X. ; Jong, M.C. ; Huang, G.B. ; Vincent, L. W S ; Kripesh, V. ; Lee, C. ; Lau, John H. ; Kwong, D.L. ; Sundaram, V. ; Tummula, Rao R. ; Meyer-Berg, G.
Author_Institution :
A STAR (Agency for Sci. Technol. & Res.), Inst. of Microelectron., Singapore, Singapore
Abstract :
In this work, piezoresistive stress sensors have been used to evaluate the stresses in thin device wafer. For the evaluation, device wafers having piezoresistive stress sensors were fabricated. The stress sensors were then calibrated to determine the piezoresistive coefficients. The evaluation of stresses in device wafer was carried out after thinning the device wafers to three different thicknesses ranging from 400 ¿m to 100 ¿m. The thinning process was performed with the help of commercial wafer back-grinding machine and the complete thinning process included rough grinding, then fine grinding, and finally polishing. It is found that wafer back-grinding of device wafer generates a large amount of compressive stress at the device wafer surface and the amount of stress increases exponentially with the decrease in wafer thickness. The stresses were also evaluated after mounting the thin device wafers on dicing tape. It is found that the mounting on dicing tape generates tensile stress at the device wafer surface. These trends of stresses in the thin device wafers were confirmed with the bending profile of thin device wafers. A detailed explanation for the development of stresses in the thin device wafer is provided in the paper.
Keywords :
bending; grinding; piezoresistance; piezoresistive devices; polishing; sensors; stress measurement; bending profile; compressive stress; dicing tape; fine grinding; piezoresistive coefficients; piezoresistive stress sensors; polishing; rough grinding; thin device wafer; thinning process; Compressive stress; Fabrication; Piezoresistance; Semiconductor device packaging; Semiconductor devices; Semiconductor materials; Silicon; Stress measurement; Tensile stress; Thermal stresses;
Conference_Titel :
Electronics Packaging Technology Conference, 2008. EPTC 2008. 10th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-2117-6
Electronic_ISBN :
978-1-4244-2118-3
DOI :
10.1109/EPTC.2008.4763605