Title :
FinFET: From compact modeling to circuit performance
Author :
He, Frank ; Zhou, Xingye ; Ma, Chenyue ; Zhang, Jian ; Liu, Zhiwei ; Wu, Wen ; Xukai Zhang ; Zhang, Lining
Author_Institution :
Shenzhen SOC Key Lab., Peking Univ., Shenzhen, China
Abstract :
FinFET device, the promise one of all candidates which may extend CMOS scaling to 10nm and beyond, has attracted intensive research interest in recent years. In paralleling the process technology and circuit design methodology, a compact model which serves as a link between the process technology and circuit design is strongly demanded. In this paper, we first review the FinFET process technology including SOI-FinFET and bulk-FinFET. Then a potential-based compact model is proposed to describe the electrical characteristics of the FinFET transistor. The model is verified by 2-D numerical simulation and is implemented into HSPICE simulator. Finally, the reliability issue of the FinFET device and circuit functions are illustrated and analyzed, which are important for the practical applications and circuit design.
Keywords :
MOSFET; SPICE; network synthesis; semiconductor device reliability; silicon-on-insulator; 2D numerical simulation; CMOS scaling; FinFET process technology; FinFET transistor; HSPICE simulator; SOI-FinFET device reliability; bulk-FinFET; circuit design methodology; circuit performance; compact modeling; electrical characteristics; intensive research; potential-based compact model; CMOS integrated circuits; DVD; Laboratories; Logic gates; Semiconductor device modeling; Stress; Topology; FinFET; circuit performance; compact modeling; reliability analysis; simulation;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2010 IEEE International Conference of
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-9997-7
DOI :
10.1109/EDSSC.2010.5713788
