Architectural measures against radiation effects in multicore SoC for safety critical applications

It is well known that microelectronics sensitivity for radiation effects steadily increases for smaller structure sizes. Additionally lowering the supply voltage decreases safety margins even further. In conclusion modern System-on-Chip (SoC) devices, which typically come as heterogeneous multicores, can be affected by radiation effects not only in space but also in much lower altitudes or even on ground level. This is especially important for safety critical systems, such as automotive or avionics electronics. In order to cope with this issue measures during all phases of development need to be taken into account. This contribution presents and discusses techniques on architectural level, which help to detect faults on the SoC, which might be caused by (but not solely) radiation effects. Additionally these techniques have to be lightweight in terms of resources and costs as safety critical applications typically target cost sensitive markets.