PN-assisted deterministic digital calibration of split two-step ADC to over 14-bit accuracy

A digital calibration technique to linearize capacitor mismatch, residue amplifier gain, and nonlinearity in a two-step ADC based on the split-ADC technique [1] is presented. Although multiple publications have been reported before on the split-calibration of pipelined ADC´s, none of them is comprehensive, meaning capacitor mismatch, residue gain, and linearity are never treated in one work at the same time. We extend the offset double conversion technique [2] to adapt it to the split-ADC architecture for seamless calibration of all static nonlinearities in a split pipelined two-step ADC. Behavioral simulation results demonstrate the effectiveness of the technique, in which the SNDR and SFDR performance of a 15-bit two-step ADC are improved from 42 dB and 50 dB to 88 dB and 103 dB on average, respectively.