DocumentCode :
252498
Title :
A reduced-memory FIR filter using approximate coefficients for ultra-low power SoCs
Author :
Klinefelter, A. ; Calhoun, B.H.
Author_Institution :
Univ. of Virginia, Charlottesville, VA, USA
fYear :
2014
fDate :
6-9 Oct. 2014
Firstpage :
1
Lastpage :
2
Abstract :
This paper presents an ultra-low power (ULP) finite-impulse response (FIR) filter using a method that approximates filter coefficients on-chip without reliance on dedicated memory such as SRAM. In a system-on-chip (SoC) context, this method allows for full power gating of the coefficient unit without coefficient state loss, and runtime modifications of filtering specifications, such as filter order and cutoff frequency. Using trigonometric approximation methods for the sinc and resource sharing of computational units, a single coefficient is generated in five clock cycles. The approximation unit is compared against standard-cell-based memories, such as register and latch files, for energy and area, and the design is synthesized in 130nm CMOS consuming 6.9nW at 300mV and 6.5kHz.
Keywords :
CMOS memory circuits; FIR filters; integrated circuit design; low-power electronics; system-on-chip; CMOS technology; ULP finite-impulse response filter; coefficient state loss; coefficient unit; computational units; cutoff frequency; filter coefficient on-chip; filter order; filtering specifications; frequency 6.5 kHz; full-power gating; latch files; power 6.9 nW; reduced-memory FIR filter; register; resource sharing; runtime modifications; standard-cell-based memories; system-on-chip context; trigonometric approximation method; ultralow-power FIR filter; ultralow-power SoC; voltage 300 mV; Approximation methods; Clocks; Finite impulse response filters; Latches; Registers; System-on-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE
Conference_Location :
Millbrae, CA
Type :
conf
DOI :
10.1109/S3S.2014.7028193
Filename :
7028193
Link To Document :
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