Zero-Temperature-Coefficient biasing point of 2.4-GHz LNA in PD SOI CMOS technology

Author

Kaamouchi, M. El ; Moussa, M. Si ; Raskin, J.P. ; Vanhoenacker-Janvier, D.

Author_Institution

Univ. Catholique de Louvain, Louvain-la-Neuve

fYear

2007

fDate

8-10 Oct. 2007

Firstpage

303

Lastpage

306

Abstract

This paper reviews and analyzes a fully integrated low-noise amplifier (LNA) for low-power and high temperature applications, in 130 nm partially depleted silicon-on-insulator (SOI) CMOS technology. The LNA has been characterized over a temperature range from 25 to 200degC and designed using a cascode inductive source degeneration topology. Thanks to the SOI technology and the choice of the zero-temperature-coefficient (ZTC) bias point, the LNA measurements show a minor degradation of the gain due to the temperature variation for a power consumption of 2.3 mW under 1.2 V supply is applied. The effects of high temperature are observed on the gain of the LNA and on the SOI transistors in order to analyze the behavior of the LNA versus temperature effect.

Keywords

CMOS integrated circuits; UHF amplifiers; UHF integrated circuits; high-temperature electronics; low noise amplifiers; low-power electronics; silicon-on-insulator; LNA; SOI CMOS technology; cascode inductive source degeneration topology; high temperature applications; integrated low-noise amplifier; partially depleted silicon-on-insulator; power 2.3 mW; size 130 nm; temperature 25 C to 200 C; temperature effect; voltage 1.2 V; zero-temperature-coefficient biasing point; CMOS integrated circuits; CMOS technology; Impedance; Integrated circuit technology; Low-noise amplifiers; Silicon on insulator technology; Temperature distribution; Temperature sensors; Topology; Well logging;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Integrated Circuit Conference, 2007. EuMIC 2007. European

Conference_Location

Munich

Print_ISBN

978-2-87487-002-6

Type

conf

DOI

10.1109/EMICC.2007.4412709

Filename

4412709