• DocumentCode
    252603
  • Title

    New precision alignment methodology for CMOS wafer bonding

  • Author

    Sugaya, I. ; Mitsuishi, H. ; Maeda, H. ; Okada, M. ; Okamoto, K.

  • Author_Institution
    Nikon Corp., Yokohama, Japan
  • fYear
    2014
  • fDate
    6-9 Oct. 2014
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    A new precision alignment methodology suitable for distorted CMOS wafer bonding is proposed. Using multiaxis-interferometer and load-cell measurements with in situ fine stage-position adjustment combined with newly designed wafer holders, two wafers are flattened and aligned precisely. The alignment capability is 250 nm or better without any damage to low-k materials, making the methodology suitable for future 3D integration.
  • Keywords
    CMOS integrated circuits; low-k dielectric thin films; wafer bonding; 3D integration; distorted CMOS wafer bonding; in situ fine stage-position adjustment; load-cell measurements; low-k materials; multiaxis-interferometer; precision alignment methodology; wafer holders; Accuracy; Bonding; CMOS integrated circuits; Clamps; Temperature measurement; Three-dimensional displays; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE
  • Conference_Location
    Millbrae, CA
  • Type

    conf

  • DOI
    10.1109/S3S.2014.7028242
  • Filename
    7028242