Title :
Closed-form expressions for extraction of capacitances in multilayer VLSI interconnects
Author :
Sharma, Rohit ; Nitin ; Sehgal, Vivek Kumar ; Chauhan, D.S.
Author_Institution :
Jaypee Univ. of Inf. Technol., Waknaghat
Abstract :
In this work, we report closed-form analytical expressions for capacitances in multilayer VLSI interconnect circuits, using conventional techniques for analysis of strip-line like structures. Variational analysis combined with transverse transmission line technique is used for the determination of capacitances, and a new set of closed-form expressions are derived which gives accurate results without any inherent assumptions. The comparisons of the results with available data in the published literature, as well as 3-D simulation results, are also discussed.
Keywords :
VLSI; capacitance; integrated circuit interconnections; multilayers; capacitance extraction; closed-form analytical expression; multilayer VLSI interconnect circuit; strip-line like structures; transverse transmission line technique; Capacitance; Closed-form solution; Computational modeling; Conductors; Dielectric substrates; Information analysis; Integrated circuit interconnections; Nonhomogeneous media; Transmission lines; Very large scale integration;
Conference_Titel :
TENCON 2008 - 2008 IEEE Region 10 Conference
Conference_Location :
Hyderabad
Print_ISBN :
978-1-4244-2408-5
Electronic_ISBN :
978-1-4244-2409-2
DOI :
10.1109/TENCON.2008.4766573
