Yield Learning Curve Models in Semiconductor Manufacturing

Semiconductor manufacturing is a constantly growing business characterized with complex production processes, advanced equipment, and volatile demand. In wafer fabrication where die are produced, good and defected die are combined on the same wafer. The proportion between good and total die, noted (die) yield, is a key performance measure in operations and has a dominant effect on manufacturing economics. Integrated circuits life cycle commonly starts with low yields that should be significantly increased and then maintained at a high level, to maximize profit. Traditional manufacturing learning curves are in the form of a power function, and exhibit decreasing cost as a function of cumulative output. This study suggests generalized multi-factor learning curves composed of power and exponential functions of cumulative output, elapsed time, and production rate. It presents a unique approach to develop compound yield learning model as a product of individual steps yield learning curves, rather than displaying total yield in former models. The proposed single step yield learning curve applies more suitable exponential function, and the compound yield product-form model illustrates sigmoid shape curve which better coincides with practice. These models provide yield forecasting tools for improving short term operations planning and supply chain efficiency, and for setting strategic directions for wafer fabrication economics.