DocumentCode
2531758
Title
Assessment of parameter extraction methods for integrated inductor design and model validation
Author
Hatzopoulos, Alkis ; Stefanou, Stefanos ; Gielen, Georges ; Schreurs, Dominique
Author_Institution
Dept. of Electr. & Comput. Eng., Aristotle Univ., Thessaloniki
fYear
2006
fDate
21-24 May 2006
Abstract
This work analyzes different parameter extraction methods for on-chip integrated inductors and assesses and their impact on inductor design. The relationship between extracted single-ended and differential parameters is investigated through the use of theoretical network models that support the calculation equations. Experimental results from a test chip are presented and a lumped model, which adequately simulates the inductor performance with and without ground shield, is validated in comparison to the simple nine-element model
Keywords
inductors; integrated circuit modelling; ground shield; on-chip integrated inductors; parameter extraction; CMOS technology; Capacitance; Circuits; Dielectric losses; Equations; Inductance; Inductors; Parameter extraction; Q factor; Radio frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1692662
Filename
1692662
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