System level energy aware fault tolerance approach for real time system

This paper investigates an integrated approach to dynamic power management with fault tolerance in real time system. The system is composed of DVS processor (frequency dependent) and peripheral devices (frequency independent) with a better survival possibility in harsh environmental conditions. The fault tolerance is achieved via checkpointing and energy minimization is done by dynamic voltage scaling and dynamic power down techniques. We estimated a critical speed which effectively balanced the fault tolerance requirement of a system and the energy consumed by the associated frequency dependent and independent devices. The simulations results and examples illustrate that our proposed approach provides better tolerance to faults where existing approaches fail to survive and still consume lesser energy.