DocumentCode :
2534105
Title :
Design of an Efficient Quantum Circuit Simulator
Author :
Maity, Sourabh ; Pal, Arunima ; Roy, Tanaya ; Mandal, Sudhindu Bikash ; Chakrabarti, Amlan
Author_Institution :
A.K. Choudhury Sch. of IT, Univ. of Calcutta, Kolkata, India
fYear :
2010
fDate :
20-22 Dec. 2010
Firstpage :
50
Lastpage :
55
Abstract :
Work is in progress throughout the globe to efficiently use the potential of the quantum theory of computation over their classical counterpart and hence there is a need of building quantum computing hardware. The target of building quantum computers can be achieved if we have better tools for the design of quantum hardware. Quantum circuit simulators are tools for the logic verification of quantum circuits and they can be an essential component of quantum CAD tools in the future. This work is the extension of the previous work by the authors, in order to increase the efficiency of the simulator and to incorporate more components in the gate library. In this paper we have proposed an efficient simulator which can simulate a quantum circuit specified using the proposed quantum hardware descriptive language (QHDL).
Keywords :
circuit simulation; hardware description languages; logic CAD; quantum computing; logic verification; quantum CAD tool; quantum circuit simulator; quantum computing; quantum hardware; quantum hardware descriptive language; Algorithm design and analysis; Computational modeling; Integrated circuit modeling; Logic gates; Quantum computing; Quantum mechanics; Tensile stress; Bit level; Circuit matrix; Gate level; Gate level matrix; QHDL; Quantum Circuit Simulator; Vision matrix;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic System Design (ISED), 2010 International Symposium on
Conference_Location :
Bhubaneswar
Print_ISBN :
978-1-4244-8979-4
Electronic_ISBN :
978-0-7695-4294-2
Type :
conf
DOI :
10.1109/ISED.2010.18
Filename :
5715148
Link To Document :
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