DocumentCode
2534262
Title
Realization of digital coherent receivers
Author
Noé, Reinhold ; Rückert, Ulrich ; Hoffmann, Sebastian ; Pfau, Timo ; Peveling, Ralf
Author_Institution
EIM-E, Univ. of Paderborn, Paderborn, Germany
fYear
2009
fDate
4-8 Oct. 2009
Firstpage
422
Lastpage
423
Abstract
The hardware architecture of digital coherent optical receivers supporting >40 Gb/s data rates and general considerations about signal processing algorithms are presented as well as a chipset layout for a 40 Gb/s digital coherent polarization-multiplexed QPSK receiver.
Keywords
multiplexing; optical receivers; quadrature phase shift keying; bit rate 40 Gbit/s; chipset layout; digital coherent optical receivers; digital coherent polarization; hardware architecture; multiplexed QPSK receiver; signal processing algorithms; Clocks; Feedback; Finite impulse response filter; Hardware; IIR filters; Optical receivers; Optical signal processing; Parallel processing; Quadrature phase shift keying; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
LEOS Annual Meeting Conference Proceedings, 2009. LEOS '09. IEEE
Conference_Location
Belek-Antalya
ISSN
1092-8081
Print_ISBN
978-1-4244-3680-4
Electronic_ISBN
1092-8081
Type
conf
DOI
10.1109/LEOS.2009.5343202
Filename
5343202
Link To Document