DocumentCode :
2536575
Title :
A Performance Estimation Technique for the SegBus Distributed Architecture
Author :
Niazi, Moazzam Fareed ; Seceleanu, Tiberiu ; Tenhunen, Hannu
Author_Institution :
Dept. of Inf. Technol., Univ. of Turku, Turku, Finland
fYear :
2010
fDate :
13-16 Sept. 2010
Firstpage :
89
Lastpage :
98
Abstract :
We propose a performance estimation technique for a multi-core segmented bus platform, SegBus. The technique enables us to assess the performance aspects of any specific application on a particular platform configuration, modeled in Unified Modeling Language (UML). We present methods to transform Packet Synchronous Data Flow (PSDF) and Platform Specific Model (PSM) models of the application into Extensible Markup Language (XML) schemes using modeling tool and how the generated XML schemes can be utilized by the emulator program to get the execution results. The technique facilitates us to estimate performance aspects of application mapped on a number of different platform configurations during the early stages of the design process.
Keywords :
Unified Modeling Language; XML; data flow computing; embedded systems; estimation theory; integrated circuit design; microprocessor chips; multiprocessing systems; Extensible Markup Language; PSM models; SegBus distributed architecture; UML; Unified Modeling Language; XML schemes; emulator program; modeling tool; multicore embedded systems; multicore segmented bus platform; packet synchronous data flow transform method; performance estimation technique; platform specific model; Computer architecture; DSL; Emulation; Field programmable gate arrays; Hardware; Unified modeling language; XML;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing Workshops (ICPPW), 2010 39th International Conference on
Conference_Location :
San Diego, CA
ISSN :
1530-2016
Print_ISBN :
978-1-4244-7918-4
Electronic_ISBN :
1530-2016
Type :
conf
DOI :
10.1109/ICPPW.2010.24
Filename :
5599214
Link To Document :
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