Title :
A reconfigurable fully-integrated 0.18-/spl mu/m CMOS feed forward equalizer IC for 10-Gb/sec backplane links
Author :
Bien, F. ; Hur, Y. ; Maeng, M. ; Kim, H. ; Gebara, E. ; Laskar, J.
Author_Institution :
Georgia Electron. Design Center, Georgia Inst. of Technol., Atlanta, GA
Abstract :
In order to realize adjustable equalization over various backplane channel configurations, a reconfigurable fully-integrated equalizer IC is presented. Backplane channels over different trace lengths and dielectric materials were measured and characterized. Feed-forward equalizer (FFE) topology with finite impulse response (FIR) architecture was chosen for optimal equalization for the corresponding backplane configurations. For a reconfigurable FFE IC implementation, wide-range tunable active delay line, variable tap-gain multiplier and 8-bit digital-to-analog converter (DAC) were fabricated in a 0.18-mum standard CMOS technology. The proposed reconfigurable FFE demonstrated successful equalization at 10Gb/sec over various channel configurations
Keywords :
CMOS integrated circuits; FIR filters; analogue-digital conversion; delay lines; dielectric materials; equalisers; multiplying circuits; 0.18 micron; 10 Gbit/s; 8 bit; active delay line; backplane channel configurations; backplane channel equalization; backplane links; dielectric materials; digital-to-analog converter; feed forward equalizer integrated circuit; feed-forward equalizer topology; finite impulse response architecture; reconfigurable fully-integrated CMOS; reconfigurable fully-integrated equalizer integrated circuit; trace lengths; variable tap-gain multiplier; Backplanes; CMOS integrated circuits; CMOS technology; Dielectric materials; Dielectric measurements; Equalizers; Feedforward systems; Feeds; Length measurement; Topology;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1693035
