A fully digital nonlinear, high-speed Rank Order Filter in 0.18μm CMOS technology

Some efficient techniques to realize modular, high-speed digital rank order filter (ROF) are presented in this paper. Using the proposed digital filters, it is possible to find the element of a certain rank (Maximum, Minimum and Median) in a given sequence of N elements in each window in M steps, where M is the number of bits used in binary representation for the elements of the sequence. A bit-level algorithm by Kar and Pradhan has been modified in this work to implement the proposed filters. The modified algorithm is implemented using N number of identical bit update circuit (BUC) along with other logic gates in 0.18 mum CMOS technology. The proposed ROF circuits are simulated using HSPICE. Simulation results depict the good performance of the filters in terms of speed and power. The ROF algorithm is also tested in FPGA. The post fit simulation output using Xilinx is presented in this paper. In both simulations the ROFpsilas performance is gratifying.