DocumentCode
2545928
Title
The vector fixed point unit of the synergistic processor element of the cell architecture processor
Author
Mäding, N. ; Leenstra, J. ; Pille, J. ; Sautter, R. ; Büttner, S. ; Ehrenreich, S. ; Haller, W.
Author_Institution
IBM Entwicklung GmbH, Boeblingen, Germany
fYear
2005
fDate
12-16 Sept. 2005
Firstpage
203
Lastpage
206
Abstract
A vector fixed point unit (FXU) is designed to speed up multimedia processing. The FXU implements SIMD style integer arithmetic and permute operations. The adder, rotator and permute structure enables the use of static circuits only. The FXU was fabricated using IBM 90nm CMOS SOI technology.
Keywords
CMOS digital integrated circuits; adders; fixed point arithmetic; microprocessor chips; multimedia computing; parallel processing; silicon-on-insulator; 90 nm; CMOS SOI technology; SIMD style integer arithmetic; adder structure; cell architecture processor; multimedia processing; permute operations; permute structure; rotator structure; static circuits; synergistic processor element; vector fixed point unit; Adders; Arithmetic; Boolean functions; CMOS technology; Clocks; Delay; Frequency; Latches; Logic; Pipelines;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European
Print_ISBN
0-7803-9205-1
Type
conf
DOI
10.1109/ESSCIR.2005.1541595
Filename
1541595
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