DocumentCode :
2546254
Title :
Super-Altro 16: A front-end system on chip for DSP based readout of gaseous detectors
Author :
Aspell, P. ; De Gaspari, M. ; Franca, H. ; Garcia, E.G. ; Musa, L.
Author_Institution :
CERN, Geneva, Switzerland
fYear :
2012
fDate :
Oct. 27 2012-Nov. 3 2012
Firstpage :
620
Lastpage :
626
Abstract :
This paper presents the architecture, design and test results of an ASIC specifically designed for the readout of gaseous detectors. The primary application is the readout of the Linear Collider Time Projection Chamber. The small area available (4mm2/channel) requires an innovative design, where sensitive analog components and massive digital functionalities are integrated on the same chip. Moreover, shut down (power pulsing) features are necessary in order to reduce the power consumption. The Super-Altro is a 16-channel demonstrator ASIC involving analog and digital signal processing. Each channel contains a low noise Pre-Amplifier and Shaping Amplifier (PASA), a pipeline ADC, and a Digital Signal Processor (DSP). The PASA is programmable in terms of gain and shaping time and can operate with both positive and negative polarities of input charge. The to-bit ADC samples the output of the PASA at a frequency up to 40MHz before providing the digitized signal to the DSP which performs baseline subtraction, signal conditioning, drift correction and zero suppression. The chip has been fabricated in a 130 nm CMOS technology. Test measurements show correct functionality of the full system, and demonstrate that, using appropriate design techniques, the extensive digital circuitries produce little or no degradation of analog performance (particularly noise).
Keywords :
CMOS integrated circuits; analogue-digital conversion; application specific integrated circuits; digital signal processing chips; integrated circuit design; integrated circuit testing; low noise amplifiers; nuclear electronics; pipeline processing; power aware computing; preamplifiers; readout electronics; signal conditioning circuits; time projection chambers; 10-bit ADC samples; 16-channel demonstrator ASIC; CMOS technology; DSP based readout; Super-Altro; analog performance; analog signal processing; baseline subtraction; design techniques; digital functionalities; digital signal processing; digital signal processor; drift correction; extensive digital circuitries; front-end system; gaseous detectors; input charge; linear collider time projection chamber; low noise PreAmplifier and Shaping Amplifier; pipeline ADC; power consumption; power pulsing; sensitive analog components; shaping time; shut down features; signal conditioning; test measurements;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2012 IEEE
Conference_Location :
Anaheim, CA
ISSN :
1082-3654
Print_ISBN :
978-1-4673-2028-3
Type :
conf
DOI :
10.1109/NSSMIC.2012.6551182
Filename :
6551182
Link To Document :
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