DocumentCode
25465
Title
Exploiting Partially-Forgetful Memories for Approximate Computing
Author
Shoushtari, Majid ; BanaiyanMofrad, Abbas ; Dutt, Nikil
Author_Institution
Dept. of Comput. Sci., Univ. of California, Irvine, Irvine, CA, USA
Volume
7
Issue
1
fYear
2015
fDate
Mar-15
Firstpage
19
Lastpage
22
Abstract
While the memory subsystem is already a major contributor to energy consumption of embedded systems, the guard-banding required for masking the effects of ever increasing manufacturing variations in memories imposes even more energy overhead. In this letter, we explore how partially-forgetful memories can be used by exploiting the intrinsic tolerance of a vast class of applications to some level of error for relaxing this guard-banding in memories. We discuss the challenges to be addressed and introduce relaxed cache as an exemplar to address these challenges for partially-forgetful SRAM caches. Preliminary results show how adapting guard-bands to application characteristics can help the system save significant amount of cache leakage energy (up to 74%) while still generating acceptable quality results.
Keywords
SRAM chips; cache storage; embedded systems; energy consumption; power aware computing; approximate computing; cache leakage energy; embedded systems; energy consumption; energy overhead; guard-banding; manufacturing variations; memory subsystem; partially-forgetful SRAM caches; partially-forgetful memories; Benchmark testing; Data structures; Hardware; PSNR; Random access memory; Reliability; Software; Approximate computing; memory hierarchy; process variation; reliability;
fLanguage
English
Journal_Title
Embedded Systems Letters, IEEE
Publisher
ieee
ISSN
1943-0663
Type
jour
DOI
10.1109/LES.2015.2393860
Filename
7014269
Link To Document