A tool for automatic design of analog circuits based on gm/I/sub D/ methodology

The goal of this paper is to present a transistor optimization methodology for analog integrated CMOS circuits, based on the physics-based gm/I_D characteristics provided by the ACM compact MOS model. This methodology is implemented in a design tool, exploiting all the design space with the use of simulated annealing optimization process. A single technology dependent curve and accurate expressions for transconductance and current in all operations regions are integrated in the methodology, providing solutions close to the optimum. The advantage of constraining the optimization within a power budget is of great importance for low-power applications. As an example, we show the optimization results obtained for the design of a folded-cascode operational amplifier and a comparison with a typical hand-made design procedure