DocumentCode :
2552375
Title :
FzCRITIC-a functional timing verifier using a novel fuzzy delay model
Author :
Jayabharathi, Rathish ; Abreu, Manuel D. ; Abraham, Jacob A.
Author_Institution :
Logic Test Technol., Intel Corp., Folsom, CA, USA
fYear :
1999
fDate :
7-10 Jan 1999
Firstpage :
232
Lastpage :
235
Abstract :
Chip performance and density are increasing tremendously and the CAD tools are always lagging behind. In this paper, we introduce a functional timing verifier using a novel fuzzy delay model which bridges the gap between the front-end timing verification and the back-end delay fault testing. The proposed fuzzy delay model can handle uncertainties with respect to timing characteristics, and manufacturing anomalies. Experimental results are presented for the ISCAS-85 benchmark circuits
Keywords :
circuit CAD; delays; fuzzy set theory; integrated circuit design; logic CAD; timing; CAD tools; FzCRITIC; ISCAS-85 benchmark circuits; functional timing verifier; fuzzy delay model; manufacturing anomalies; timing characteristics; uncertainties; Bridge circuits; Circuit faults; Circuit testing; Delay effects; Delay estimation; Fabrication; Jacobian matrices; Logic testing; Timing; Uncertainty;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1999. Proceedings. Twelfth International Conference On
Conference_Location :
Goa
ISSN :
1063-9667
Print_ISBN :
0-7695-0013-7
Type :
conf
DOI :
10.1109/ICVD.1999.745153
Filename :
745153
Link To Document :
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