DocumentCode
2553422
Title
An asynchronous delta-sigma converter implementation
Author
Wei, Dazhi ; Garg, Vaibhav ; Harris, John G.
Author_Institution
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL
fYear
2006
fDate
21-24 May 2006
Abstract
In this paper an architecture, signal reconstruction algorithm and first-ever implementation of an asynchronous delta-sigma converter are presented. The signal reconstruction algorithm can mathematically perfectly reconstruct the original signal only using timing events. A prototype circuit designed and fabricated in a standard 0.5mum CMOS process with a 5V power supply is presented. The tests show that an 8-bit resolution with 6kHz signal bandwidth and only 715 muW power consumption is possible
Keywords
CMOS integrated circuits; asynchronous circuits; delta-sigma modulation; signal reconstruction; 0.5 micron; 5 V; 6 kHz; 715 muW; CMOS process; asynchronous delta-sigma converter; signal reconstruction algorithm; Clocks; Energy consumption; Equations; Quantization; Signal design; Signal processing; Signal reconstruction; Switches; Timing; Trigger circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693730
Filename
1693730
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