DRAM EOS failure mechanisms and failure analysis by non-destructive technique

Electrical overstress has historically been one of the leading failure damage of integrated circuit. The result of an EOS event can range from soft damage with degradation to the IC up to catastrophic failure where the IC is permanently non-functional. Recent development of new DRAM technology with shrinking gate oxide dimension revealed severity of EOS failure mechanisms increasing obviously and proved to be a challenge to traditional failures analysis technique. Various analytical techniques have been introduced for EOS localization finding. In this paper, a non -destructive technique (X-ray and ultrasonic wave scanning) has been applied for component failure analysis.