A performance analysis of Hetero- Dielectric Dual-Material-Gate silicon-on-insulator tunnel field effect transistors (HD-DMG SOI TFETs)

Author

Mathew, S. ; Medhi, S. ; Tiwari, P.K.

Author_Institution

Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol., Rourkela, India

fYear

2014

fDate

11-13 Dec. 2014

Firstpage

1

Lastpage

5

Abstract

In this work, an investigation into the performance of Hetero-Dielectric Dual-Material-Gate SOI Tunnel FET (HD-DMG SOI TFET) by varying the work functions of both tunnel and auxiliary gates and analysing its influence on the transfer characteristics and the threshold voltage is done. With a suitable combination of work functions of both the tunnel and auxiliary gates, steeper Id-Vg variations and ION to IOFF ratio as high as 1.6×10¹¹ has been achieved. It has also been found that using a high K dielectric near the tunnel junction and low K dielectric near the drain junction enhances the tunneling ON current. A comparison of electrical characteristics of HD-DMG-SOI TFET with that of Single Dielectric Dual Material Gate SOI Tunnel FET (SD-DMG SOI TFET) is also presented.

Keywords

field effect transistors; silicon-on-insulator; work function; auxiliary gates; heterodielectric dual-material-gate SOI tunnel FET; high K dielectric; low K dielectric; silicon-on-insulator tunnel field effect transistors; single dielectric dual material gate SOI tunnel FET; tunnel gates; tunnel junction; work functions; Dielectrics; Field effect transistors; Junctions; Logic gates; Materials; Threshold voltage; Tunneling; DIBL; Dual Material Gate; Hetero Dielectric; Silicon-On-Insulator Tunnel FET; Threshold voltage roll-off;

fLanguage

English

Publisher

ieee

Conference_Titel

India Conference (INDICON), 2014 Annual IEEE

Conference_Location

Pune

Print_ISBN

978-1-4799-5362-2

Type

conf

DOI

10.1109/INDICON.2014.7030627

Filename

7030627