• DocumentCode
    2559743
  • Title

    DC & transient circuit simulation methodologies for organic electronics

  • Author

    Navan, Ramesh R. ; Thakker, Rajesh A. ; Tiwari, S.P. ; Baghini, M. Shojaei ; Patil, M.B. ; Mhaisalkar, S.G. ; Rao, V. Ramgopal

  • Author_Institution
    EE-Dept. IIT Bombay, IIT Bombay, Mumbai, India
  • fYear
    2009
  • fDate
    1-2 June 2009
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This work establishes a novel circuit simulation methodology for organic thin film transistors (OTFTs). Because of a lack of well developed physical models for OTFTs and due to the limitations of conventional parameter extraction techniques, the approaches presented in this work come in handy for circuit designers. The first approach uses a look-up table (LUT) model, which is implemented in a general purpose public-domain circuit simulator SEQUEL (solver for circuit equations with user-defined elements). In the second approach, circuit simulation is performed using equivalent SPICE parameters, which are extracted using a global optimization technique namely particle swarm optimization (PSO) algorithm. A good match has been observed between LUT simulations and SPICE based circuit simulations for both DC and transient cases.
  • Keywords
    SPICE; circuit optimisation; circuit simulation; digital integrated circuits; integrated circuit design; organic semiconductors; particle swarm optimisation; table lookup; thin film transistors; transient analysis; DC circuit simulation; LUT model; PSO algorithm; SPICE; circuit design; global optimization; look-up table; organic electronics; organic thin film transistor; particle swarm optimization; public-domain circuit simulator SEQUEL; solver for circuit equations with user-defined elements; transient circuit simulation; Circuit simulation; MOSFETs; Organic electronics; Organic semiconductors; Organic thin film transistors; Particle swarm optimization; SPICE; Table lookup; Thin film transistors; Voltage; Look-up table (LUT); Organic thin film transistor (OTFT); Particle swarm optimization (PSO); SEQUEL;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices and Semiconductor Technology, 2009. IEDST '09. 2nd International Workshop on
  • Conference_Location
    Mumbai
  • Print_ISBN
    978-1-4244-3831-0
  • Electronic_ISBN
    978-1-4244-3832-7
  • Type

    conf

  • DOI
    10.1109/EDST.2009.5166122
  • Filename
    5166122