Gate recess structure engineering in MESFETs to achieve higher schottky breakdown voltage for switch MMIC applications

In this paper we report for the first time, a method of generating wide gate recess structure in single recess step by the help of a bi-layer lithography technique, which can be used to generate varying gate recess width by varying developmental time. It is established that the gate recess structure decides the Schottky breakdown voltages in these devices. The distance from gate edge-to-n⁺ in the recess structure becomes very critical for high Vb. Commonly, double recessing is used to achieve this, which is more complicated. We have achieved Vb as high as 20 volts using single recess.