Title :
A Receiver Structure of Joint LDPC Decoding and Synchronization for Deep Space Communications
Author :
Wan Zengran ; Zhan Yafeng ; Wu Jianqiang ; Bao Jianrong
Author_Institution :
Space Center, Tsinghua Univ., Beijing, China
Abstract :
A receiver structure based on a joint LDPC decoding and synchronization algorithm and realized on an FPGA platform is introduced. The realization system achieves the BER of 1e-5 at the channel SNR of -4.6 dB with moderate hardware complexity, and the performance degradation is less than 1.3 dB from the ideal situation. So it is suitable for deep space communications and other wireless communications.
Keywords :
decoding; error statistics; field programmable gate arrays; parity check codes; radio receivers; space communication links; synchronisation; BER; FPGA platform; LDPC decoding; channel SNR; deep space communications; hardware complexity; receiver structure; synchronization algorithm; wireless communications; Bit error rate; Decoding; Parity check codes; Receivers; Signal to noise ratio; Synchronization;
Conference_Titel :
Wireless Communications Networking and Mobile Computing (WiCOM), 2010 6th International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-3708-5
Electronic_ISBN :
978-1-4244-3709-2
DOI :
10.1109/WICOM.2010.5600957
