DocumentCode :
2560014
Title :
A SIMD Video Signal Processor with Efficient Data Organization
Author :
Liu, Kunjie ; Qin, Xing ; Yan, Xiaolang ; Quan, Li
Author_Institution :
Inst. of VLSI, Zhejiang Univ., Hangzhou
fYear :
2006
fDate :
13-15 Nov. 2006
Firstpage :
115
Lastpage :
118
Abstract :
A single instruction multiple data (SIMD) video signal processor (VSP) is presented in this paper. To provide flexible and efficient data organization, a separate control/data-preparing pipeline and global switch register file with write-transposer and read-permuter is designed. Since data preparation is offloaded from computing core, this VSP promises sustained performance close to its peak computational rates of 64-bit SIMD ALU/MAC datapath. The benchmarking shows that the proposed VSP forms a highly efficient solution to emerging H.264/AVC video decoder.
Keywords :
data flow computing; digital signal processing chips; parallel architectures; video codecs; video signal processing; H.264/AVC video decoder; SIMD ALU/MAC datapath; SIMD video signal processor; control/data-preparing pipeline; data organization; data preparation; global switch register file; read-permuter; single instruction multiple data VSP; write- transposer; Application specific processors; Computer architecture; Concurrent computing; Decoding; Master-slave; Pipelines; Registers; Signal processing; Switches; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian
Conference_Location :
Hangzhou
Print_ISBN :
0-7803-9734-7
Electronic_ISBN :
0-7803-97375-5
Type :
conf
DOI :
10.1109/ASSCC.2006.357865
Filename :
4197604
Link To Document :
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