Title :
Validating 2.5D System-in-Package inter-die communication on silicon interposer
Author :
Kumar, P. ; Naveen, H.N.
Author_Institution :
Syst. & Software Group, Open-Silicon Res. Pvt Ltd., Pune, India
Abstract :
2.5D Integrated Circuit (IC) technology is a new approach in designing System-in-Package (SiP) which offer flexibility in mixing dice available in different technology nodes and applications inside a single package and interconnecting them on silicon interposer. This results in reducing overall system complexity, less on-board components, cost and size. This technology is capable of powering next generation ICs targeted towards tablets, cell phones and portable electronics. 2.5D technology differs from existing 2D-IC technologies such as System-on-Chip (SoC), Multi-Chip Module (MCM) and System-in-Package (SiP) in terms of usage of silicon interposer as a medium for inter-die communication. This provides high bandwidth, low power dissipation and overcomes routing congestion. Sample use cases of 2.5D are explained in the paper. A test chip project showcases functional working of 2.5D IC on Printed Circuit Board (PCB). Finally, usage of 2.5D-IC technology for multi-domain, multi-manufacturing node is been proposed and concluded.
Keywords :
elemental semiconductors; silicon; system-in-package; 2.5D system-in-package interdie communication; 2D-IC technologies; MCM; SiP; SoC; cell phones; integrated circuit technology; multichip module; multidomain node; multimanufacturing node; portable electronics; silicon interposer; system-on-chip; tablets; Codecs; Routing; Silicon; Substrates; System-on-chip; Vehicles; 2.5D-IC; 2D-IC; Advanced eXtensible Interface (AXI); Die-to-Die; Interposer; MCM; SiP; SoC; TSV; flip-chip; micro bumps; wire-bonds;
Conference_Titel :
Electrical Design of Advanced Packaging & Systems Symposium (EDAPS), 2014 IEEE
Conference_Location :
Bangalore
DOI :
10.1109/EDAPS.2014.7030816