Title :
1993 European Conference on Design Automation with the European Event in ASIC Design
Abstract :
The following topics are dealt with: logic and circuit simulation methods; floorplans and global routing; design system integration; CAD systems for high-level design; design verification and Boolean matching; formal methods in design; new directions in routing; design for testability; high-level testing; placement; synthesis and optimization of sequential circuits; built-in self test; mixed digital analog designs; representations and manipulations of Boolean functions; interconnect issues in high-level synthesis; technology mapping; emerging issues in design systems; power estimation; multilevel combinational synthesis; scheduling algorithms and storage synthesis; layout analysis and optimization; fault simulation and testability measures; new algorithms for timing analysis; application-specific CAD advances in test-pattern generation; asynchronous design techniques; architecture of digital systems; new approaches in data path synthesis; and layout-driven synthesis
Keywords :
application specific integrated circuits; circuit CAD; circuit analysis computing; circuit layout CAD; design for testability; integrated circuit design; logic CAD; logic testing; network routing; ASIC design; Boolean functions; Boolean matching; CAD systems; application-specific CAD advances; architecture; asynchronous design techniques; built-in self test; circuit simulation methods; data path synthesis; design automation; design for testability; design system integration; design verification; digital systems; fault simulation; floorplans; formal methods; global routing; high-level design; high-level synthesis; high-level testing; interconnect issues; layout analysis; layout-driven synthesis; logic simulation methods; mixed digital analog designs; multilevel combinational synthesis; optimization; placement; power estimation; scheduling algorithms; sequential circuits; storage synthesis; synthesis; technology mapping; test-pattern generation; timing analysis;
Conference_Titel :
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Conference_Location :
Paris, France
Print_ISBN :
0-8186-3410-3
DOI :
10.1109/EDAC.1993.386511