CIC filter and FFT implementation to improve power efficiency in Software Defined Radio

The primary principle of Software Defined Radio based system is to support a multiple wireless communication services in a single system design. The RF transmission supports multiple channel communication. The channelizers used in SDR, extracts expected channels from received RF frequency band and perform baseband processing. This paper proposes the power efficient channelizers for selection of the bandwidth based target application using FPGA. It uses cascaded-integrator-comb (CIC) filer to achieve multi-rate sampling. The proposed channelizer shows improved performance as compared with state of the art solutions. Complexity is reduced if mixer and digital down synthesizers are removed. Same thing is achieved by using Polyphase FFT those are multiplier free.