DocumentCode
256289
Title
A parallel hardware architecture for Scale Invariant Feature Transform (SIFT)
Author
Qasaimeh, Murad ; Sagahyroon, Assim ; Shanableh, T.
Author_Institution
Dept. of Comput. Sci. & Eng., American Univ. of Sharjah, Sharjah, United Arab Emirates
fYear
2014
fDate
14-16 April 2014
Firstpage
295
Lastpage
300
Abstract
Scale Invariant Feature Transform (SIFT) is an efficient algorithm for extracting distinctive features from images. It is used in many computer vision applications such as object recognition, motion estimation, robot mapping and navigation. Although it has an outstanding performance, its implementation requires extensive computations, and it is very difficult to achieve near real-time feature extraction using software implementation only. Hence, there is a clear advantage in exploring the feasibility of implementing the algorithm using customized hardware with the intent of achieving real-time performance. In this paper, a parallel hardware architecture is proposed to accelerate the SIFT features extraction. The proposed approach is viable and yields promising results in terms of accuracy, speed, and hardware resources.
Keywords
feature extraction; parallel architectures; transforms; SIFT algorithm; accuracy resource; computer vision applications; hardware resource; motion estimation; object recognition; parallel hardware architecture; real-time feature extraction; robot mapping; robot navigation; scale invariant feature transform; software implementation; speed resource; Accuracy; Interpolation; Table lookup; Vectors; FPGA; Hardware Architecture; Object Recognition; Reconfigurable Computing; SIFT;
fLanguage
English
Publisher
ieee
Conference_Titel
Multimedia Computing and Systems (ICMCS), 2014 International Conference on
Conference_Location
Marrakech
Print_ISBN
978-1-4799-3823-0
Type
conf
DOI
10.1109/ICMCS.2014.6911251
Filename
6911251
Link To Document