• DocumentCode
    2563374
  • Title

    Implementation of scalable interconnect networks for data reordering used in Discrete Trigonometric Transforms (DTT)

  • Author

    Hussein, Adel ; Suleiman, Adnan ; Kerkiz, Nabil ; Akopian, David

  • Author_Institution
    Electr. & Comput. Eng. Dept., Univ. of Texas at San Antonio, Austin, TX, USA
  • fYear
    2009
  • fDate
    18-20 May 2009
  • Firstpage
    139
  • Lastpage
    142
  • Abstract
    The number of processing elements (PE) can be reduces significantly using partial column structure to perform Discrete Trigonometric Transform (DTT) computation. Data reordering is required between stages (columns). A scalable interconnect network for both global and local for data reordering is presented in this paper. The network scalability is based on the transform size and the number of processing elements (PE). The structure will reorder data on the fly and eliminate the need of memory. This will help evaluating throughput vs. complexity (cost and area.). Detail analysis of hardware cost will be presented.
  • Keywords
    integrated circuit interconnections; transforms; data reordering; discrete trigonometric transforms; network scalability; partial column structure; processing elements; scalable interconnect network; transform size; Computer networks; Costs; Data engineering; Digital signal processing; Discrete transforms; Geometry; Multiprocessor interconnection networks; Pipelines; Scalability; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    IC Design and Technology, 2009. ICICDT '09. IEEE International Conference on
  • Conference_Location
    Austin, TX
  • Print_ISBN
    978-1-4244-2933-2
  • Electronic_ISBN
    978-1-4244-2934-9
  • Type

    conf

  • DOI
    10.1109/ICICDT.2009.5166282
  • Filename
    5166282