DocumentCode :
2565584
Title :
Efficient Testing Of Clock Regenerator Circuits In Scan Designs
Author :
Raina, Rajesh ; Bailey, Robert ; Njinda, Charles ; Molyneaux, Robert ; Beh, Charlie
Author_Institution :
Motorola Inc.
fYear :
1997
fDate :
9-13 June 1997
Firstpage :
95
Lastpage :
100
Keywords :
Circuit faults; Circuit testing; Clocks; Hardware; Microprocessors; Permission; Power generation; Pulp manufacturing; Test pattern generators; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
ISSN :
0738-100X
Print_ISBN :
0-7803-4093-0
Type :
conf
DOI :
10.1109/DAC.1997.597124
Filename :
597124
Link To Document :
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