DocumentCode
2565616
Title
A new method in harmonics testing
Author
Song, Wang ; Mingguang, Liu ; Na, Li ; Hualong, Xu
Author_Institution
Beijing Jiaotong Univ., Beijing
fYear
2008
fDate
2-4 July 2008
Firstpage
3461
Lastpage
3464
Abstract
This paper presents a method to design a harmonics tester. The method makes use of modern DSP technology which uses the tool of DSPbuilder of Altera. The design process is to fulfill the FFT computing in MATLAB. Then through being translated and edited, the file is downloaded to FPGA. Finally, the SOPC system is setup by the FPGA, peripheral sampling, keyboard and display circuits. The method can greatly improve the developing efficiency, shorten developing period and reduce costs. The practice has proved the accuracy and validity of the method.
Keywords
digital signal processing chips; field programmable gate arrays; Altera; DSP technology; DSPbuilder; FFT computing; FPGA; MATLAB; SOPC system; harmonics testing; Circuits; Design methodology; Digital signal processing; Displays; Field programmable gate arrays; Keyboards; MATLAB; Process design; Sampling methods; Testing; FFT; Harmonic; Modem DSP; SOPC; Tester;
fLanguage
English
Publisher
ieee
Conference_Titel
Control and Decision Conference, 2008. CCDC 2008. Chinese
Conference_Location
Yantai, Shandong
Print_ISBN
978-1-4244-1733-9
Electronic_ISBN
978-1-4244-1734-6
Type
conf
DOI
10.1109/CCDC.2008.4597972
Filename
4597972
Link To Document