FPGA realization of three-phase Space-Vector PWM

A novel digital design of space-vector pulse width modulator (SVPWM) is presented. The proposed design is implemented on a FPGA (XC3S500E) from Xilinx. The whole design structure contains three level pipelines, with adjustable switching frequency and dead time, whose parameters should be adapted to the different situations. So the design is more universal. Experimental results show that this design can present high performance in its switching frequency and accuracy. And very few resources on the chip are used, so more resources are ready for other function modules.