Title :
A 4b/cell NROM 1Gb Data-Storage Memory
Author :
Polansky, Y. ; Lavan, A. ; Sahar, R. ; Dadashev, O. ; Betser, Yoram ; Cohen, G. ; Maayan, Eduardo ; Eitan, B. ; Ful-Long Ni ; Yen-Hui Joseph Ku ; Chih-Yuan Lu ; Tim Chang-Ting Chen ; Chun-Yu Liao ; Chin-Hung Chang ; Chung-Kuang Chen ; Wen-Chiao Ho ; Yite
Author_Institution :
Saifun Semicond., Netanya
Abstract :
A 4b/cell 1Gb data flash based on a low-cost NROM process technology is achieved. The design includes a two-phase programming algorithm for supporting a fast and accurate threshold-voltage control. The read scheme incorporates a simple error-detection mechanism combined with an accurate drain-side sensing circuit with a built-in offset cancellation
Keywords :
fault diagnosis; flash memories; integrated circuit design; logic design; read-only storage; NROM; data flash; data storage memory; drain side sensing circuit; error detection mechanism; offset cancellation; read scheme; threshold voltage control; two phase programming; Capacitors; Costs; Dielectrics; Manufacturing processes; Microcontrollers; Nonvolatile memory; Parallel programming; Radio access networks; Read only memory; Semiconductor device manufacture;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696077
