DocumentCode
2568883
Title
Architectural Exploration Using Verilog-based Power Estimation: A Case Study Of The Idct
Author
Xanthopoulos, Thucydides ; Yaoi, Yoshifumi ; Chandrakasan, Anantha
Author_Institution
Massachusetts Institute of Technology
fYear
1997
fDate
9-13 June 1997
Firstpage
415
Lastpage
420
Keywords
Computational modeling; Computer aided software engineering; Discrete cosine transforms; Energy dissipation; Hardware design languages; Permission; Signal processing algorithms; Transform coding; Video compression; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location
Anaheim, CA, USA
ISSN
0738-100X
Print_ISBN
0-7803-4093-0
Type
conf
DOI
10.1109/DAC.1997.597183
Filename
597183
Link To Document