Title :
An Investigation Of Power Delay Trade-offs On Powerpc
Author :
Wang, Qi ; Vrudhula, Sarma B K ; Ganguly, Shantanu
Author_Institution :
ECE Dept., University of Arizona
Keywords :
CMOS logic circuits; Delay estimation; Energy consumption; Logic circuits; Low power electronics; Optimization methods; Packaging; Permission; Power generation; Reflection;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-4093-0
DOI :
10.1109/DAC.1997.597185
