Title :
Low-Power built-in logic block observer realization for BIST applications
Author :
Chun-Lung Hsu ; Cheng, Chang-Hsin
Author_Institution :
Nat. Dong Hwa Univ., Hualien
Abstract :
This paper presents a low-power built-in logic block observer (LP-BILBO) to realize the performance in minimum power consumption. The proposed LP-BILBO is based on a low-power test module (LPTM) design to divide the system clock into two independent clocks for reducing the switching activity in power savings. Simulation results show that the proposed LP-BILBO can effectively save its own power consumption up to 48% (on average) during the low-power operation modes. Also, the performance analysis in benchmark ISCAS´89 circuits indicates that on average 44% power reduction can be obtained when the proposed LP-BILBO is adopted in the testing scheme.
Keywords :
built-in self test; logic circuits; low-power electronics; observers; BIST applications; LP-BILBO; low-power built-in logic block observer; low-power test module design; minimum power consumption; Built-in self-test; Circuit testing; Clocks; Design methodology; Energy consumption; Logic testing; Registers; System testing; System-on-a-chip; Very large scale integration;
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
DOI :
10.1109/ICASIC.2007.4415800
