Title :
Influence of 1 nm-thick structural "strained-layer" near SiO/sub 2//Si interface on sub-4 nm-thick gate oxide reliability
Author :
Eriguchi, K. ; Harada, Y. ; Niwa, M.
Author_Institution :
ULSI Process Technol. Dev. Center, Matsushita Electron. Corp., Kyoto, Japan
Abstract :
The relationship between the structural property and the electrical characteristics of thin SiO/sub 2/ below 4 nm is investigated. The structural "strained-layer" near SiO/sub 2//Si interface is confirmed to affect strongly the TDDB (time dependent dielectric breakdown) lifetime of the thin gate oxides. The increase of the built-in compressive strain analyzed by the XPS (X-ray photoelectron spectroscopy) based technique is experimentally found to decrease the TDDB lifetime.
Keywords :
MOS capacitors; MOS integrated circuits; ULSI; X-ray photoelectron spectra; elemental semiconductors; insulating thin films; integrated circuit reliability; semiconductor device breakdown; semiconductor-insulator boundaries; silicon; silicon compounds; MOS capacitors; SiO/sub 2/-Si; TDDB; XPS; built-in compressive strain; electrical characteristics; gate oxide reliability; strained-layer; structural property; time dependent dielectric breakdown; Bonding; Capacitive sensors; Dielectric breakdown; Dry etching; Electric variables; Electrodes; Hafnium; Oxidation; Spectroscopy; Ultra large scale integration;
Conference_Titel :
Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-4774-9
DOI :
10.1109/IEDM.1998.746312
