Title :
Circuit requirement and integration challenges of thin gate dielectrics for ultra small MOSFETs
Author_Institution :
Bell Labs., Lucent Technol., Murray Hill, NJ, USA
Abstract :
The trend of CMOS technologies toward high-speed, low-power, and systems-on-a-chip has raised several urgent requirements on the gate dielectrics: (1) limited leakage current, (2) multiple thickness (t/sub ox/), (3) minimized variation or degradation of device threshold voltage (V/sub th/), transconductance (G/sub m/), and on-current (I/sub on/) at the finish of the device fabrication due to, e.g., oxide-nitridation-induced degradation or plasma-damage-induced degradation, (4) sustained device lifetime that has been difficult to achieve because of the aggressive device scaling, and (5) a practical and physical mean of qualifying thin gate dielectrics. The significance of each of the above requirements will be discussed, and recent efforts addressing these requirements will be reviewed.
Keywords :
MOSFET; dielectric thin films; CMOS technology; degradation; device lifetime; device scaling; gate dielectric; integrated circuit; leakage current; multiple thickness; on-current; oxide nitridation; plasma damage; qualification; threshold voltage; transconductance; ultra small MOSFET; CMOS technology; Circuits; Degradation; Dielectric devices; Electric breakdown; Energy consumption; Leakage current; MOSFETs; Plasma devices; Random access memory;
Conference_Titel :
Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-4774-9
DOI :
10.1109/IEDM.1998.746464
