DocumentCode :
2575723
Title :
Memory Bandwidth Optimization Strategy of Coarse-Grained Reconfigurable Architecture
Author :
Cao, Peng ; Jiang, Huiyan ; Liu, Bo ; Shan, Weiwei
Author_Institution :
Nat. ASIC Syst. Eng. Technol. Res. Center, Southeast Univ., Nanjing, China
fYear :
2012
fDate :
10-12 Oct. 2012
Firstpage :
228
Lastpage :
231
Abstract :
With the increasingly efficient streaming of multimedia standard and the computational resources in the coarse grained reconfigurable architecture (CGRA), how to provide high data throughput for the CGRA for multimedia application in real time becomes a bottleneck challenge. In this paper, a data reuse method is proposed based on the pre-parsing mechanism of MB information in advance. The pre-parsed information guides the replacement process of the data buffer. By employing the data reuse method, the required bandwidth can be reduced by nearly 50% on average and the CGRA can support 1080p@30fps video decoding at the frequency of 200MHz.
Keywords :
multimedia computing; optimisation; video coding; CGRA; MB information; coarse-grained reconfigurable architecture; computational resources; data reuse method; memory bandwidth optimization strategy; multimedia application; multimedia standard; video decoding; Bandwidth; Decoding; Memory management; Multimedia communication; Reconfigurable architectures; Streaming media; coarse-grained reconfigurable architecture; data buffer memory bandwidth; multimedia applicatios;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Cyber-Enabled Distributed Computing and Knowledge Discovery (CyberC), 2012 International Conference on
Conference_Location :
Sanya
Print_ISBN :
978-1-4673-2624-7
Type :
conf
DOI :
10.1109/CyberC.2012.45
Filename :
6384972
Link To Document :
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