DocumentCode
2575881
Title
High thermal stability and low junction leakage current of Ti capped Co salicide and its feasibility for high thermal budget CMOS devices
Author
Dong Kyun Sohn ; Ji-Soo Park ; Byung Hak Lee ; Jong-Uk Bae ; Kyung Soo Oh ; Seh Kwang Lee ; Jeong Soo Byun ; Jae Jeong Kim
Author_Institution
R&D Div., LG Semicon Co. Ltd., Cheongju, South Korea
fYear
1998
fDate
6-9 Dec. 1998
Firstpage
1005
Lastpage
1008
Abstract
A thermally stable cobalt salicide has been fabricated using Ti-capping Co/Si system. A Ti-capping layer is shown to improve the interfacial roughness and thermal stability of CoSi/sub 2/ film grown on Si substrate comparing with TiN-capping. It is attributed to high amount of Ti atoms in Co disilicide film, which slow down the agglomeration. According to the results of salicided gate and junction, Ti capped CoSi, had stable characteristics when the thermal budget increased up to 850/spl deg/C for 90 min. Therefore, Ti-capping Co salicide structure can be acceptable to fabricate DRAM and LOGIC-embedded DRAMs.
Keywords
CMOS integrated circuits; annealing; cobalt compounds; integrated circuit metallisation; interface roughness; leakage currents; thermal stability; titanium; 850 C; CMOS device; CoSi/sub 2/ film; CoSi/sub 2/-Si; DRAM; Si substrate; Ti; Ti capping layer; agglomeration; cobalt salicide; interfacial roughness; junction leakage current; logic-embedded DRAM; thermal budget; thermal stability; Annealing; Electrical resistance measurement; Leakage current; Random access memory; Semiconductor films; Silicides; Substrates; Temperature; Thermal stability; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-4774-9
Type
conf
DOI
10.1109/IEDM.1998.746524
Filename
746524
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