2578815

Fully Planarized Stacked Capacitor Cell With Deep And High Aspect Ratio Contact Hole For Gigs-bit DRAM

Itabashi, K. ; Tsuboi, S. ; Nakamura, H. ; Hashimoto, K. ; Futoh, W. ; Fukuda, K. ; Hanyu, I. ; Asai, S. ; Chijimatsu ; Kawamura, E. ; Yao, T. ; Takagi, H. ; Ohta, Y. ; Karasawa, T. ; Iio, H. ; Onods ; Inoue, F. ; Nomura, H. ; Satoh, Y. ; Higashimoto, M.

Fujitsu Ltd., 4-1-1, Kamikodanaka, Nakahara-ku, Kawasaki 211-88, Japan

1997

10-12 June 1997

21

22

English

ieee

VLSI Technology, 1997. Digest of Technical Papers., 1997 Symposium on

4-930813-75-1

conf

10.1109/VLSIT.1997.623675

623675