• DocumentCode
    2581850
  • Title

    Low power design methodologies for mobile communication

  • Author

    Kakerow, Ralf

  • Author_Institution
    Nokia Res. Center, Bochum, Germany
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    8
  • Lastpage
    13
  • Abstract
    The rapid development of multimedia applications and the Internet leads to the demand of mobility for these services. New wireless standards are supporting high data rates and additional services, but they require complex realizations in both frontend and baseband of a mobile system. The obtainable performance of such a system is often limited by the power consumption of the implementation, as long stand-by and talk times are still key parameters of a mobile terminal. Also the thermal problem, given by insufficient heat removal with highly integrated high-performance circuits in narrow-spaced terminals, calls for optimizations concerning power consumption. This paper discusses the problem of power consumption in system on chip (SoC) design for mobile applications and presents methodologies for power optimized design.
  • Keywords
    field programmable gate arrays; mobile communication; power consumption; system-on-chip; Internet; heat removal; integrated high-performance circuits; low power design methodologies; mobile communication; power consumption; power optimized design; system on chip design; thermal problem; wireless standards; Baseband; Circuits; Design methodology; Energy consumption; GSM; MOSFETs; Mobile communication; Mobile handsets; System-on-a-chip; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
  • ISSN
    1063-6404
  • Print_ISBN
    0-7695-1700-5
  • Type

    conf

  • DOI
    10.1109/ICCD.2002.1106739
  • Filename
    1106739