DocumentCode :
2583491
Title :
Digitalizing gate control of high efficiency, high frequency and high power chopper circuit SAZZ using FPGA
Author :
Tsuruta, Yukinori ; Pavlovsky, Martin ; Kawamura, Atsuo
Author_Institution :
Yokohama Nat. Univ., Yokohama City
fYear :
2007
fDate :
2-5 Sept. 2007
Firstpage :
1
Lastpage :
7
Abstract :
In the past, we have proposed a high frequency, high efficiency and high power chopper based on new soft switching topology SAZZ (Snubber Assisted Zero Voltage and Zero Current Transition chopper) for FCEV application. We studied the effectiveness of the SAZZ method by simulation and by experiment. This time we concentrated on digital control of SAZZ converter by FPGA. We report on the status quo of the digitalization of SAZZ gate control.
Keywords :
choppers (circuits); field programmable gate arrays; power convertors; snubbers; zero current switching; FPGA; digitalizing gate control; power chopper circuit; snubber assisted zero voltage; soft switching topology; zero current transition chopper; Choppers; Circuit topology; Digital control; Field programmable gate arrays; Frequency; Hybrid electric vehicles; Insulated gate bipolar transistors; RLC circuits; Switching converters; Zero voltage switching; Converter control; IGBT; Power converter for FCEV; Soft switching; ZCSZVS converter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics and Applications, 2007 European Conference on
Conference_Location :
Aalborg
Print_ISBN :
978-92-75815-10-8
Electronic_ISBN :
978-92-75815-10-8
Type :
conf
DOI :
10.1109/EPE.2007.4417525
Filename :
4417525
Link To Document :
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