DocumentCode :
258457
Title :
A framework for efficient rapid prototyping by virtually enlarging FPGA resources
Author :
Takamaeda-Yamazaki, Shinya ; Kise, Kenji
Author_Institution :
Nara Inst. of Sci. & Technol., Nara, Japan
fYear :
2014
fDate :
8-10 Dec. 2014
Firstpage :
1
Lastpage :
8
Abstract :
Rapid prototyping using FPGAs is a widely-applied approach for efficient evaluation of hardware structures. We present a rapid prototyping framework by virtually enlarging available FPGA resources. In order to mitigate the development complexity of FPGA-based hardware prototype, the framework provides two abstractions of resources on FPGA platforms: Memory systems and inter-FPGA interconnections on multi-FPGA platforms. The framework enables designers to draw up a target hardware using abstract interfaces as ideal memory systems and interconnections on FPGA platforms. Our evaluation result shows that the slowdowns in running speed under the abstractions are not critical, so that the framework offers the helpful support to develop a high-speed and accurate hardware prototype rapidly.
Keywords :
field programmable gate arrays; software prototyping; FPGA platform; FPGA resource enlargement; FPGA-based hardware prototype; rapid prototyping; Abstracts; Field programmable gate arrays; Hardware; Hardware design languages; Memory management; Random access memory; System-on-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ReConFigurable Computing and FPGAs (ReConFig), 2014 International Conference on
Conference_Location :
Cancun
Print_ISBN :
978-1-4799-5943-3
Type :
conf
DOI :
10.1109/ReConFig.2014.7032488
Filename :
7032488
Link To Document :
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