Title :
Fully-depleted strained-Si on insulator NMOSFETs without relaxed SiGe buffers
Author :
Haizhou Yin ; Hobart, K.D. ; Peterson, R.L. ; Kub, F.J. ; Shieh, S.R. ; Duffy, T.S. ; Sturm, J.C.
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Abstract :
Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6%, equivalent to that of a conventional strained Si layer grown on a relaxed Si/sub 0.85/Ge/sub 0.15/ buffer, exhibit 60% mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.
Keywords :
CMOS integrated circuits; MOSFET; carrier mobility; internal stresses; semiconductor device measurement; silicon-on-insulator; wafer bonding; BPSG; MOSFET strain level; Si; SiGe layer; SiGe-Si; SiGe/Si structure stress balance; Smart-cut processes; compliant borophosphosilicate insulator; device complexity; fully-depleted strained-Si on insulator NMOSFET; misfit dislocations; mobility enhancement; process complexity; relaxed Si/sub 0.85/Ge/sub 0.15/ buffer; relaxed SiGe buffers; strain level; strained Si n-channel MOSFET; wafer bonding; Buffer layers; Capacitive sensors; Germanium silicon alloys; Insulation; MOSFETs; Semiconductor films; Silicon germanium; Strain control; Tensile strain; Wafer bonding;
Conference_Titel :
Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7872-5
DOI :
10.1109/IEDM.2003.1269164